FAQ: Power-Rail Sequencing and Slew Rate


How do power slew rates effect electronics?

The rate that your power-supply rail comes up to its intended voltage or falls back down to zero directly affects all of the chips and devices connected to it. The ICs in your design have myriad internal capacitances. The current a capacitor will pass is directly proportional to the slew rate of the voltage across it. The same applies to the various stray and intentional capacitors in your circuit. Stray and intended inductance tend to be less problematical, but it’s a similar issue.

The voltage across an inductance is proportional to the slew rate of the current through it. Many an engineer has developed a circuit while using a lab supply. The headache comes when the real system supply is connected. It’s sure to have a different slew rate, as well as ripple and noise.

What’s the trouble with fast slew rates?

A fast power application can inject current into unintended nodes inside your ICs. While working on a laser driver chip that was almost ready for high-volume production, our design team realized that a sudden application of power would put the chip into an unintended reset mode.

Another problem comes with something as simple as an offline capacitive power supply (Fig. 1). You size the capacitor and resistor to give the right amount of voltage when working on a steady 60- or 50-Hz wall outlet. Unfortunately, when you plug this in, or flip on a switch or breaker, the wall voltage might be at its peak, and thus a large current spike crosses the capacitor, leading to an overvoltage of the load.

1. With a fixed load, capacitor C1 will conduct enough current from your 60-cycle wall outlet to make a low, stable voltage. You need the Zener diode when it comes time to plug this into the wall, which might hit the capacitor with a 172-V spike at maximum line voltage. (Courtesy of Microchip)

One solution is to put in a beefy Zener diode clamp to protect the load. Conventional linear and switching regulators have bulk storage capacitors that take a large surge of current at turn-on. You may have to design in active or passive inrush protection.

What’s the trouble with slow slew rates?

Slow power slew rates can cause just as many headaches. A modern IC has a multitude of internal bias and control circuits. A friend used a popular switching regulator chip in his LED flashlight prototype. The part was supposed to have a continuous mode, as well as a “burp” mode for low loads. Yet with a battery, where power falls off very slowly, my friend found “a linear mode, where the chip just burns up.” The manufacturer did not make clear the chip wasn’t intended for battery power.

Why won’t my oscillator work?

Some oscillator circuits count on noise or a “kick” from the application of power to become unstable and start oscillation. This is why many Spice simulations of oscillators don’t work. Be sure to apply power with a pulse after the Spice program establishes the dc bias of the nodes. Similarly, a marginal oscillator may just remain stable if power comes up too slowly. A former manager told me about a radar unit on his Navy ship that he had to physically kick to get the oscillator going. The kick shook the vacuum-tube filaments, which got the circuit to start working.

Why won’t my reset circuit work?

When power is applied to a digital circuit, all bets are off regarding how it will act. The slew rate of the power application may completely change the operation. That’s why you should not use 555 timers to do power-on reset. Buy a reset chip instead (Fig. 2).

2. A power-on reset chip will hold the reset line low (active) until the power-supply rail rises to the proper level. There’s a hysteresis when the power rail drops, which will then reassert the reset line. The output delay time is designed to give the microcontroller’s internal circuitry time to bias up and become stable before the reset line is released. (Courtesy of Ricoh)2. A power-on reset chip will hold the reset line low (active) until the power-supply rail rises to the proper level. There’s a hysteresis when the power rail drops, which will then reassert the reset line. The output delay time is designed to give the microcontroller’s internal circuitry time to bias up and become stable before the reset line is released. (Courtesy of Ricoh)

Why does my wall wart blow up my circuit?

The AN88 application note from Analog Devices explains how the inductance in your long wall-wart cable will react with the ceramic capacitors in your circuit’s power system to create an overshoot that can damage things. The sudden application of power means a fast slew rate that takes a large spike of current to charge the ceramic capacitors. Once that current is flowing in the cable inductance, it tends to keep flowing, if only momentarily, causing the overvoltage at your circuit.

Why does my amplifier float away for two seconds?

Many analog and digital chips will latch up if voltage appears at any input before power is supplied to the chip. Even trickier, the chip might just not work for a few seconds. A sensor company wanted to turn on a remote amplifier, take the measurement in a few milliseconds, and then power down, to save energy. The problem was that the amplifier would just not work for two or three seconds after power on.

It was a slew-rate problem, where the decoupling capacitor on the amplifier was so large, it delayed the power to the chip long enough so that voltage first appeared at an input. It didn’t latch the chip, but injected free carriers in the die substrate, which had to recombine before the amp would work as intended. Modern processes are so clean and defect-free, it took several seconds for these free carriers to recombine, whereas an older chip might have done it in milliseconds.

Should I worry about turn-off rates?

The speed at which your power rail drops can be a problem. I have worked at two microcontroller manufacturers. They both had a chip that would bulk-erase its own memory if the power to the chip dropped slowly. The digital engineers didn’t have simulation tools at the transistor level. The analog IC designers at the companies told me, “Once you get supply voltage down to a diode drop or two, there is no telling what a digital circuit will do.” It turned out there was a race condition that would assert the bulk erase line with a slow power turn-off slew rate. It took six months to find.

Why is the order of power sequencing important?

The above issues can arise with just a single supply. When there are multiple supplies, you not only have to worry about the slew rates of turn-on and turn-off, you must make sure the order of power application doesn’t cause any problems. FPGAs and complex microcontrollers may have many power rails, and the datasheet will give guidance on slew rates, and the timing of power application.

Integrated circuits have electrostatic-discharge (ESD) diodes on all of the inputs to protect the internal circuitry. If voltage is applied to an input, it will forward-bias the internal ESD diode, and that will apply power to the IC’s power pin from the inside (Fig. 3). Now that whole power rail will be energized, perhaps causing havoc in your design.

3. If voltage appears at an input before you apply power, the internal ESD diode in an IC will forward-bias and send power to the power pin. That internal power path will then power everything on that power rail, with unexpected results.3. If voltage appears at an input before you apply power, the internal ESD diode in an IC will forward-bias and send power to the power pin. That internal power path will then power everything on that power rail, with unexpected results.

Power slew rates and sequencing present you with a Goldilocks problem. Not too fast, not too slow, but just right—and in the right order, no less.



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